1. Field of the Invention
The present invention relates to systems and methods for verifying layouts of circuit traces on motherboards, and particularly to a system and method for verifying a layout of traces on a motherboard by determining whether the traces have been placed sufficiently distant from split planes of the motherboard.
2. Related Art of the Invention
A motherboard is made with an N-layer PCB (printed circuit board) on which electronic components must be properly positioned to reduce or eliminate electromagnetic interference (EMI). EMI is an electrical disturbance in an electronics-based system such as a computer system. EMI is caused by phenomena such as high-frequency waves emitted from integrated circuits and other electronic components. Standards have been established which stipulate the maximum EMI which a device is permitted to emit. These are known as electromagnetic compatibility (EMC) standards. In the United States, the Federal Communications Commission sets limits on the EMI output of electronic components. Other countries also set their own limits on the EMI output of electronic components. Therefore, when an engineer designs a PCB, he/she must ensure that EMI emissions coming from the circuits positioned on the PCB are at or below the maximum levels allowed in relevant jurisdictions.
A crowded PCB generally has a number of split planes distributed thereon, whereby the split planes can potentially interfere with the intended flow of electrical current. If a current encounters a split plane, the current is liable to be diverted to other areas of the PCB that are full of electrical devices and cause EMI. To reduce or eliminate EMI, EMC standards specify minimum distances between a circuit and the split planes. Therefore when an engineer designs a PCB, he/she must take the applicable minimum distance(s) into account, and lay out the circuits to be at least the applicable minimum distance(s) away from each split plane.
Once the layout is designed, it must be verified to insure that circuits have been properly placed in order to reduce EMI. Traditional methods of verifying the layout rely heavily on sheer manpower, and cannot precisely check the distances between the circuits and the split planes. These methods are time consuming, and do not always prevent motherboards with inexact layouts being produced. Thus, there is a need to provide a system and method which are able to not only (i) automatically verify the distances between circuits and split planes, but also (ii) reduce or even eliminate EMI that arises from said distances being too short.